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ATmega128
Port C Input Pins
Address – PINC
Bit
Read/ W rite
Initial Value
7
PINC7
R
N/A
6
PINC6
R
N/A
5
PINC5
R
N/A
4
PINC4
R
N/A
3
PINC3
R
N/A
2
PINC2
R
N/A
1
PINC1
R
N/A
0
PINC0
R
N/A
PINC
In Atmel ? AVR ? ATmega103 compatibility mode, DDRC and PINC Registers are initialized to
being Push-Pull Zero Output. The port pins assumes their initial value, even if the clock is not
running. Note that the DDRC and PINC Registers are available in ATmega103 compatibility
mode, and should not be used for 100% back-ward compatibility.
Port D Data Register –
PORTD
Bit
Read/ W rite
Initial Value
7
PORTD7
R/ W
0
6
PORTD6
R/ W
0
5
PORTD5
R/ W
0
4
PORTD4
R/ W
0
3
PORTD3
R/ W
0
2
PORTD2
R/ W
0
1
PORTD1
R/ W
0
0
PORTD0
R/ W
0
PORTD
Port D Data Direction
Register – DDRD
Bit
Read/ W rite
Initial Value
7
DDD7
R/ W
0
6
DDD6
R/ W
0
5
DDD5
R/ W
0
4
DDD4
R/ W
0
3
DDD3
R/ W
0
2
DDD2
R/ W
0
1
DDD1
R/ W
0
0
DDD0
R/ W
0
DDRD
Port D Input Pins
Address – PIND
Bit
Read/ W rite
Initial Value
7
PIND7
R
N/A
6
PIND6
R
N/A
5
PIND5
R
N/A
4
PIND4
R
N/A
3
PIND3
R
N/A
2
PIND2
R
N/A
1
PIND1
R
N/A
0
PIND0
R
N/A
PIND
Port E Data Register –
PORTE
Bit
Read/ W rite
Initial Value
7
PORTE7
R/ W
0
6
PORTE6
R/ W
0
5
PORTE5
R/ W
0
4
PORTE4
R/ W
0
3
PORTE3
R/ W
0
2
PORTE2
R/ W
0
1
PORTE1
R/ W
0
0
PORTE0
R/ W
0
PORTE
Port E Data Direction
Register – DDRE
Bit
Read/ W rite
Initial Value
7
DDE7
R/ W
0
6
DDE6
R/ W
0
5
DDE5
R/ W
0
4
DDE4
R/ W
0
3
DDE3
R/ W
0
2
DDE2
R/ W
0
1
DDE1
R/ W
0
0
DDE0
R/ W
0
DDRE
Port E Input Pins
Address – PINE
Bit
Read/ W rite
Initial Value
7
PINE7
R
N/A
6
PINE6
R
N/A
5
PINE5
R
N/A
4
PINE4
R
N/A
3
PINE3
R
N/A
2
PINE2
R
N/A
1
PINE1
R
N/A
0
PINE0
R
N/A
PINF
Port F Data Register –
PORTF
Bit
Read/ W rite
Initial Value
7
PORTF7
R/ W
0
6
PORTF6
R/ W
0
5
PORTF5
R/ W
0
4
PORTF4
R/ W
0
3
PORTF3
R/ W
0
2
PORTF2
R/ W
0
1
PORTF1
R/ W
0
0
PORTF0
R/ W
0
PORTF
87
2467X–AVR–06/11
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